A Survey of Memory Consistency Models

PhD Qualifying Examination


Title: "A Survey of Memory Consistency Models"

by

Mr. Shaoming Huang


Abstract:

The memory consistency model or memory model, which specifi es the meaning of 
shared variables, is at the heart of the concurrency semantics for 
shared-memory multithreaded programming. The simplest and most intuitive memory 
model is sequential consistency (SC), which is largely an interleaved semantics 
in the program order of each thread, requiring that a read returns the value 
written by the most recent write. Unfortunately, SC prohibits many compiler and 
hardware optimizations thereby negatively impacting performance. Tremendous 
research eff orts are therefore paid on memory models in attempts to make the 
best tradeoff between the programmability and the performance. However, 
this has arguably been one of the most challenging problems in both the program 
language specifi cation and the hardware architecture. Although the latest 
revision of the Java memory model (JMM) has made a major stride based on a 
consensus of the data-race-free model, the state of the art is still far from 
satisfactory. JMM is complex and hard to reason about even by experts, and even 
contains surprising bugs discovered by some recent work. In this report, we 
investigate in deep the challenges in memory consistency models. By reviewing 
the JMM, the C++ memory model and several other relaxed memory models, we 
discuss the fundamental shortcomings these models expose and the implications 
for future research. We also list a few potential research problems related 
to memory consistency models as our future work.


Date:                   Monday, 24 May 2010

Time:                   3:00pm - 5:00pm

Venue:                  Room 3402
                         lifts 17/18

Committee Members:      Dr. Charles Zhang (Supervisor)
                         Dr. Shing-Chi Cheung (Chairperson)
                         Dr. Lin Gu
 			Dr. Sunghun Kim


**** ALL are Welcome ****