Software Solutions to Hardware Problems in the Billion-Transistor Era

Speaker:        Dr. Jae W. LEE
                Sungkyunkwan University,
                Korea

Title:          "Software Solutions to Hardware Problems in the
                Billion-Transistor Era"

Date:           Monday, 20 February 2012

Time:           4:00pm - 5:00pm

Venue:          Lecture Theatre F (near lifts 25/26), HKUST

Abstract:

The computer industry's success for the past three decades has been
primarily driven by Moore's Law, which states a long-term technology trend
of the transistor count on a chip doubling every two years. The
exponential increase in transistor count implies an exponential reduction
in transistor size, which makes modern processor design more challenging
than ever. With operating voltage remaining relatively constant,
high-performance single-core processors hit a physical limit on the amount
of power a chip can dissipate, called the Power Wall. This has caused an
end to exponential increases in clock frequencies and forced an
industry-wide shift to multicores. However, multicores are only a half
solution to the problem since the difficult task of extracting and
exploiting parallelism should be handled by software. In this talk, I will
first present recent progress in software-only speculative pipeline
parallelization and run-time parallelism adaptation to achieve scalable
and robust performance on multicores. If time permits, I will also briefly
introduce software-only techniques to improve fault tolerance in modern
microprocessors.

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Biography:

Jae W. Lee is an assistant professor in the Department of Semiconductor
Systems Engineering at Sungkyunkwan University, Korea. His research areas
include computer architecture/compilers, VLSI design, parallel
programming, and computer security, and he has co-authored over a dozen
papers in these areas. He led the first ASIC implementation of physical
uncloneable function (PUF) at MIT and has held various engineering
positions at Nvidia, Nokia, and Parakinetics. He received his M.S. degree
in Electrical Engineering from Stanford University and Ph.D. degree in
Computer Science from MIT.

Web: http://icc.skku.ac.kr/~jaewlee/